A Simple Phase Compensation Technique with Improved PSRR for CMOS Opamps (Special Section of Papers Selected from ITC-CSCC'99)

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概要

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• A simple phase compensation technique with improved power supply rejection ratio (PSRR) for CMOS opamps is proposed. This technique is based on feeding back a current proportional to derivative of the voltage difference between an output and an input, and does not require a common-gate circuit or a noise-free bias for the circuit. The proposed technique requires only two additional transistors, which are connected to the differential pair of transistors in a cascade manner, and the compensation capacitor is connected to the source node of the additional transistor. Experimental results show an improvement of more than 20 dB in the PSRR at high frequencies, comparing the technique with a miller compensation. This technique also improves the unity gain frequency and the phase margin from 0.9 MHz and 17° to 1.8MHz and 44° for 200pF load capacitance, respectively.

• 社団法人電子情報通信学会の論文
• 2000-06-25

著者

• Iida Tetsuya

  The Author Is With System Lsi Division Semiconductor Company Toshiba Corporation

• ITAKURA Tetsuro

  The author is with Corporate Research & Development Center, Toshiba Corporation

• Itakura Tetsuro

  The Author Is With Corporate Research & Development Center Toshiba Corporation

関連論文

• A Simple Phase Compensation Technique with Improved PSRR for CMOS Opamps (Special Section of Papers Selected from ITC-CSCC'99)

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