Testability Analysis of Analog Circuits via Determinant Decision Diagrams (Special Section on VLSI Design and CAD Algorithms)

スポンサーリンク

概要

• 論文の詳細を見る

• The use of the column-rank of the system sensitivity matrix as a testability measure for parametric faults in linear analog circuits was pioneered by Sen and Saeks in 1970s, and later re-introduced by several others. Its practical use has been limited by how it can be calculated. Numerical algorithms suffer from inevitable round-off errors, while traditional symbolic techniques can only handle very small circuits. In this paper, an efficient method is introduced for the analysis of Sen and Saeks' analog testability. The method employs determinant decision diagram based symbolic circuit analysis. Experimental results have demonstrated the new method is capable of handling much larger analog circuits.

• 社団法人電子情報通信学会の論文
• 2000-12-25

著者

• Shi C‐j

  Univ. Washington Wa Usa

• Pi Tao

  The Department Of Electrical Engineering University Washington

• SHI Chuan-Jin

  the Department of Electrical Engineering, University Washington

関連論文

• Testability Analysis of Analog Circuits via Determinant Decision Diagrams (Special Section on VLSI Design and CAD Algorithms)

スポンサーリンク