The Controlling Value Boolean Matching (Special Section on VLSI Design and CAD Algorithms)

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概要

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• We present here the Controlling Value Boolean Matching based on fault analysis. The problem is to match a Boolean function with don't cares on library cells under arbitrary input permutations and/or input-output phase assignments. Most of the library cells can be represented by tree structure circuits. The approach presented here is suitable for these structures and computes the Boolean matching better than the structural matching used in SIS. It can handle library cells with a general topology and reconvergent paths. The benchmark test shows that the Controlling Value Boolean Matching can be as faster as the structural matching used in SIS.

• 一般社団法人電子情報通信学会の論文
• 1997-10-25

著者

• Trullemans Anne-marie

  Ucl University In Belgium

• Ferreira Ricardo

  Ucl University In Belgium

• ZHANG Qinhai

  Synopsys Inc.

関連論文

• The Controlling Value Boolean Matching (Special Section on VLSI Design and CAD Algorithms)

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