Simulated Inductance Circuit with Parallel Negative Conductance and Its Application for a Sinusoidal Oscillator (Special Section of Letters Selected from the 1995 Society Conference of IEICE)

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概要

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• This paper is described on the realization of simulated inductance circuit with parallel negative conductance and its application for an oscillator. The design's condition for realizing the circuit needs stability, narrow expanse of elements, larger dynamic-range and lower sensitivity. A new floating simulated inductance circuit with parallel negative conductance with two operational amplifiers, four resistors, and four capacitors is created by using the design's algorithm. And the elements sensitivity of the simulated circuit is superior to that of the conventional circuits. By experimenting with a resonance circuit, the author tested the sinusoidal oscillator's circuit of a parallel -GLC as an application in order to confirm the operation of the simulated inductance circuit with parallel negative conductance.

• 社団法人電子情報通信学会の論文
• 1996-05-25

著者

• Imai Yukio

  Tokai University Junior College

関連論文

• Simulated Inductance Circuit with Parallel Negative Conductance and Its Application for a Sinusoidal Oscillator (Special Section of Letters Selected from the 1995 Society Conference of IEICE)

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