High-Speed Digital Circuit for Discrete Cosine Transform

スポンサーリンク

概要

• 論文の詳細を見る

• This paper deals with a high-speed digital circuit for discrete cosine transform (DCT). We propose a new algorithm that reduces the number of calculations for partial sum-of-products in the DCT and synthesize the small gate depth circuit of DCT by using carry-propagation-free adders based on redundant binary {- 1, 0, + 1} representation. The gate depth is only half to one third that of the conventional algorithms with the same number of gates.

• 一般社団法人電子情報通信学会の論文
• 1995-08-25

著者

• Tonomura Motonobu

  Central Research Laboratory Hitachi Ltd.

関連論文

• High-Speed Digital Circuit for Discrete Cosine Transform

スポンサーリンク