A Design and Implementation of a Single-Chip Encoder/Decoder using LZSE Algorithm with Dictionary Search Processor(DISP)

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概要

• 論文の詳細を見る

• We design and implementation of a single-chip LZSE encoder/decoder using LZSS algorithm and entropy by using a 0.6μm CMOS technology. The dictionary search processor(DISP) used a 2K×8-bit on-chip memory in clock speed of 50MHz. This indicates that each one clock out of total 33 clocks is used for update the string window of dictionary, and the remaining clocks per duration are used for compressing each one of data by byte unit. Consequently, LZSE was guaranteed 46% of the average compression ratio that applied entropy coding to output of LZSS codewords. This indicates that it has performance more than 7% higher compression ratio than as in the LZSS method.

• 社団法人電子情報通信学会の論文
• 2001-06-29

著者

• Kang Dong-chual

  Department Of Electrical En. University Of Ulsan

• Cho Sang-pok

  Department Of Electrical En. University Of Ulsan

• Kim Jong-seop

  Department Of Electrical En. University Of Ulsan

関連論文

• A Design and Implementation of a Single-Chip Encoder/Decoder using LZSE Algorithm with Dictionary Search Processor(DISP)
• A Design and Implementation of a Single-Chip Encoder/Decoder using LZSE Algorithm with Dictionary Search Processor(DISP)

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