A Thorough Study of Thin Gate Oxide Degradation during Fabrication of Advanced CMOSFET's

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概要

• 論文の詳細を見る

• This study is focused on the analytical method to amalyze the degradation of gate oxide integrity. The current components of p-MOSFET's were measured with carrier separation method. For comprehensive understanding, we used three kinds of devices, which are the fresh, the stressed, and the damaged devices. With the information for composition of gate current, the location of the damage layer in gate oxide can be deduced. In our device, valence hole tunneling current is the dominant component of gate current in inversion mode, which implies the damage region was generated near polysilicon/SiO_2 interface.

• 社団法人電子情報通信学会の論文
• 2001-06-28

著者

• Lee Won-gyu

  Dept.of Computer & Communication Eng.uiduk University

• Lee Jae-Sung

  Dept.of Computer & Communication Eng.Uiduk University

• Ahn Heui-Gyun

  Dept.of Computer & Communication Eng.Uiduk University

• Lee Jae-sung

  Dept.of Computer & Communication Eng.uiduk University

• Ahn Heui-gyun

  Dept.of Computer & Communication Eng.uiduk University

• Ahn Heuy-Gyun

  Dept.of Computer & Communication Eng.Uiduk University

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• K-band p-HEMT-based MMIC VCO using a miniaturized hairpin resonator and a three-terminal p-HEMT varactor with low phase noise and high output power properties
• A Thorough Study of Thin Gate Oxide Degradation during Fabrication of Advanced CMOSFET's
• A Thorough Study of Thin Gate Oxide Degradation during Fabrication of Advanced CMOSFET's

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