A 1.1 M LIPS (i.e. MHz) Flat GHC Interpreter for the Hitachi Supercomputer S-820
スポンサーリンク
概要
- 論文の詳細を見る
We will describe some optimizations of an implementation of Flat GHC For the Hitachi S-820/80 supercomputer. The implementation performs about 1.1 million process reductions per second, for a concatenate-type benchmark.
- 一般社団法人情報処理学会の論文
- 1988-09-12
著者
関連論文
- Optimizations for Automatic Extraction of Parallelism
- 4L-2 Call-Graph Optimization of Java Applications
- A 1.1 M LIPS (i.e. MHz) Flat GHC Interpreter for the Hitachi Supercomputer S-820