ウェハーバンププロセス技術

概要

論文の詳細を見る
As a need of miniaturization of electronic devices is strongly increased, for example, in the area of LCD module, interconnection and packaging technology of controller LSI are quickly changed to small sizes. This change has involved the change of gold bump specification like pitch, shape and height. Solder bump technology is well known as C4 process and also has long history. This bump is applied to interconnect of LSI to inorganic or organic substrate with reflow treatment known as flipchip. This method is a strong technology to miniaturization of consumer goods and to realize the decrease of speed delay in high end CPU. Bumping is a combination of many surface treatment technologies like sputtering, organic resist coating, electroplating and etching. It is necessary to integrate these technologies. In this article, we explain the manufacturing technology of gold and solder bump and urgent or future problems based on our experience.
社団法人日本時計学会の論文
1999-06-10