A 32-bit LISP Processor for the Al Workstation ELIS with a Multiple Programming Paradigm Language, TAO

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概要

• 論文の詳細を見る

• This paper describes a 32-bit LISP processor chip developed for the AI workstation ELIS with the multiple programming paradigm language TAO. The objective of this microprocessor is to realize an S-expression machine that can match the speed of conventional machines for compiled code execution. Architectural features are a repetitive structure for VLSI implementation of the tagged architecture and a dedicated datapath for list manipulation. All the processor functions are realized on a single VLSI chip that uses a 2-micron CMOS process. ELIS supports not only LISP but also multiple programming paradigms. The ELIS interpreter has a higher performance than that of any other dedicated machine on the market.

• 一般社団法人情報処理学会の論文
• 1990-08-25

著者

• Hibino Yasushi

  Division Of Dental Biomaterials Science Department Of Restorative And Biomaterials Sciences Meikai U

• Hibino Yasushi

  Nippon Telegraph And Telephone Corporation Human Interface Laboratories

• Takeuchi I

  Ntt Basic Research Laboratories

• Watanabe Kazufumi

  Nippon Telegraph And Telephone Corporation Human Interface Laboratories

• TAKEUCHI IKUO

  Nippon Telegraph and Telephone Corporation Basic Research Laboratories

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• A 32-bit LISP Processor for the Al Workstation ELIS with a Multiple Programming Paradigm Language, TAO

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