Architecture of an AI Processor Chip (IP1704)
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概要
- 論文の詳細を見る
The CPU of the AI processor (AIP) called IP704 was developed for Prolog and Lisp, based on RISC architecture with hardware supports. It has been proved that IP704 architecture is effective for both AI languages and general-purpose languages. An AI processor chip (IP 1704) is being developed as a direct successor of the IP704. The architecture has been modified and refined to fit onto a single chip and to improve the execution speed. Features newly developed for the IP1704 include Overlapping of the decode and register-read stages using a combination of the hardware decoder and micro-programs, and a delayed cache hit check with delayed writing. Is shown that a RISC-based processor with suitable hardware support is applicable to VLSI and also gives high performance AI languages.
- 一般社団法人情報処理学会の論文
- 1990-08-25
著者
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Aikawa Takeshi
Information Systems Laboratory Toshiba Research And Development Center Toshiba Corporation
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SAITO MITSUO
Information Systems Laboratory, Toshiba Research and Development Center, Toshiba Corporation
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MATOBA TSUKASA
Information Systems Laboratory, Toshiba Research and Development Center, Toshiba Corporation
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OKAMURA MITSUYOSHI
Information Systems Laboratory, Toshiba Research and Development Center, Toshiba Corporation
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MINAGAWA KENJI
Information Systems Laboratory, Toshiba Research and Development Center, Toshiba Corporation
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ISHII TADATOSHI
Information and Communication Systems Laboratory, Toshiba Corporation
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Minagawa Kenji
Information Systems Laboratory Toshiba Research And Development Center Toshiba Corporation
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Matoba Tsukasa
Information Systems Laboratory Toshiba Research And Development Center Toshiba Corporation
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Ishii Tadatoshi
Information And Communication Systems Laboratory Toshiba Corporation
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Okamura Mitsuyoshi
Information Systems Laboratory Toshiba Research And Development Center Toshiba Corporation
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Saito Mitsuo
Information Systems Laboratory Toshiba Research And Development Center Toshiba Corporation