Data Compression by Hardware PEM(Pattern Extraction Method) Using Multi Processor Elements

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概要

• 論文の詳細を見る

• Many methods for data compression aiming at high speed processing and realtime processing have been developed. Previously, we proposed a data compression method by automatic pattern extraction (PEM; Pattern Extraction Method), which improved compression ratio only. However, PEM wastes much CPU time for data compression. In tnis paper, HPEM(Hardware PEM) is developed for high speed parallel processing of data compression from a modified PEM algorithm. A HPEM system consists of several thousands of processor elements (PE's) connected in cascade, and each PE contains about 1000 transistors. The HPEM system has a data compression speed of about 600 times faster compared with a program of the PEM algorithm on a 1 MIPS computer. The architecture of the HPEM hardware and the evaluation of the HPEM system by simulation are reported.

• 一般社団法人情報処理学会の論文
• 1987-03-15

著者

• KAWAMURA TOMOYUKI

  Department of Pediatrics, Osaka City University Graduate School of Medicine

• Kawamura Tomoyuki

  Department Of Information Electronics Tokuyama Technical College

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• Data Compression by Hardware PEM(Pattern Extraction Method) Using Multi Processor Elements

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