An Address Pattern Generator for a On-Demand Paging System Simulation

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概要

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• An address pattern generator based on a two stack model is proposed in this paper. Paging behavior of an address pattern generated by this generator is compared with that of an example of an actual pattern, and its usability is indicated. To show the effectiveness of the generator, paging behavior simulation of a multiprogrammed on-demand paging system is performed using the address pattern generator. The main emphasis is put on the comparison of various scheduling algorithms. It is shown that to give equal CPU time to each program in a multiprogramming mix, memory allocation rather than time slicing plays a key role. Associated overhead to accomplish this goal is also described.

• 一般社団法人情報処理学会の論文

著者

• Muraoka Yoichi

  Yokosuka Electrical Communication Laboratory Nippon Telegraph And Telephone Public Corp.

関連論文

• An Address Pattern Generator for a On-Demand Paging System Simulation

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