Iterative Synthesis Methods Estimating Programmable-Wire Congestion in a Dynamically Reconfigurable Processor

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概要

• 論文の詳細を見る
• 2011-12-01

著者

• Okamoto Takumi

  Renesas Electronics Corporation

• TOI Takao

  Renesas Electronics Corporation

• AWASHIMA Toru

  Renesas Electronics Corporation

• WAKABAYASHI Kazutoshi

  Keio University

• AMANO Hideharu

  NEC Corporation

• Toru Awashima

  NEC Corporation

関連論文

• Iterative Synthesis Methods Estimating Programmable-Wire Congestion in a Dynamically Reconfigurable Processor
• High-level Synthesis Challenges for Mapping a Complete Program on a Dynamically Reconfigurable Processor

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