DFV-Aware Flip-Flops Using C-Elements

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概要

• 論文の詳細を見る

• Advanced nanometer circuits are susceptible to errors caused by process, voltage, and temperature (PVT) variations or due to a single event upset (SEU). State-of-the-art design-for-variability (DFV)-aware flip-flops (FFs) suffer from their area and timing overheads. By utilizing C-element modules, two types of FFs are proposed for error detection and error correction.

• （社）電子情報通信学会の論文
• 2011-07-01

著者

• Cho Youngmin

  Kyung Hee University

• YOON Changnoh

  Kyung Hee University

• KIM Jinsang

  Kyung Hee University

• Kim Jinsang

  Kyung Hee Univ.

関連論文

• DFV-Aware Flip-Flops Using C-Elements

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