HDLs Modeling Technique for Burst-Mode and Extended Burst-Mode Asynchronous Circuits

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概要

• 論文の詳細を見る

• A hardware description languages (HDLs) based modeling technique for asynchronous circuits is presented in this paper. A HDLs handshake package has been developed for expressing handshake-style digital systems in both VHDL and Verilog. Burst-mode and extended burst-mode (BM/XBM) circuits were used to demonstrate the usefulness of this work. This research successfully prototyped comparators, adders, RSA encoder/decoder, and several self-timed circuits for the full-custom IC and FPGAs designs. Furthermore, the HDLs handshake package implemented by this research can be utilized to develop behavioral test benches for studying and analyzing asynchronous designs. Extracting detailed timing information from asynchronous finite state machines (AFSMs), detecting delay faults for synthesized self-timed functional modules, and locating fundamental mode violation within realized AFSMs are proven applications. The anticipated HDL modeling technique and the transformation procedure are detailed in the rest of this paper.

• 2010-12-01

著者

• YANG Jung-Lin

  Department of Electronic Engineering, Southern Taiwan University

• WEI Jau-Cheng

  Department of Electronic Engineering, Southern Taiwan University

• LU Shin-Nung

  Department of Electronic Engineering, Southern Taiwan University

• Yang Jung-lin

  Department Of Electronic Engineering Southern Taiwan University

• Wei Jau-cheng

  Department Of Electronic Engineering Southern Taiwan University

• Lu Shin-nung

  Department Of Electronic Engineering Southern Taiwan University

関連論文

• HDLs Modeling Technique for Burst-Mode and Extended Burst-Mode Asynchronous Circuits
• Ultra Low Power Delay Element with Post-Chip Adjustable Ability
• HDLs Modeling Technique for Burst-Mode and Extended Burst-Mode Asynchronous Circuits

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