Design of Low Power QPP Interleave Address Generator Using the Periodicity of QPP

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概要

• 論文の詳細を見る

• This paper presents two power-saving designs for Quadratic Polynomial Permutation (QPP) interleave address generator of which interleave length K is fixed and unfixed, respectively. These designs are based on our observation that the quadratic term f2x2%K of f(x) = (f1x + f2x2)%K, which is the QPP address generating function, has a short period and is symmetric within the period. Power consumption is reduced by 27.4% in the design with fixed-K and 5.4% in the design with unfixed-K on the average for various values of K, when compared with existing designs.

• （社）電子情報通信学会の論文
• 2009-06-01

著者

• Lee Won-ho

  Dept. Of Computer Science Sogang University

• Rim Chong

  Dept. Of Computer Science Sogang University

関連論文

• Design of Low Power QPP Interleave Address Generator Using the Periodicity of QPP

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