Formal Model for the Reduction of the Dynamic Energy Consumption in Multi-Layer Memory Subsystems

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概要

• 論文の詳細を見る

• In real-time data-dominated communication and multimedia processing applications, a multi-layer memory hierarchy is typically used to enhance the system performance and also to reduce the energy consumption. Savings of dynamic energy can be obtained by accessing frequently used data from smaller on-chip memories rather than from large background memories. This paper focuses on the reduction of the dynamic energy consumption in the memory subsystem of multidimensional signal processing systems, starting from the high-level algorithmic specification of the application. The paper presents a formal model which identifies those parts of arrays more intensely accessed, taking also into account the relative lifetimes of the signals. Tested on a two-layer memory hierarchy, this model led to savings of dynamic energy from 40% to over 70% relative to the energy used in the case of flat memory designs.

• （社）電子情報通信学会の論文
• 2008-12-01

著者

• Pradhan Dhiraj

  Dept. Of Computer Science Bristol University

• ZHU Hongwei

  Physical IP Division, ARM Inc.

• LUICAN Ilie

  Dept. of Computer Science, Univ. of Illinois at Chicago

• BALASA Florin

  Dept. of Computer Science and Information Systems, Southern Utah University

• Luican Ilie

  Dept. Of Computer Science University Of Illinois At Chicago

• Zhu Hongwei

  Physical Ip Division Arm Inc.

• Balasa Florin

  Dept. Of Computer Science And Information Systems Southern Utah University

関連論文

• Formal Model for the Reduction of the Dynamic Energy Consumption in Multi-Layer Memory Subsystems
• Energy-Aware Memory Allocation Framework for Embedded Data-Intensive Signal Processing Applications
• Memory Size Computation for Real-Time Multimedia Applications Based on Polyhedral Decomposition(System Level Design,VLSI Design and CAD Algorithms)

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