Low-Complexity Parallel Systolic Montgomery Multipliers over GF(2^m) Using Toeplitz Matrix-Vector Representation
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概要
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In this paper, a generalized Montgomery multiplication algorithm in GF (2m) using the Toeplitz matrix-vector representation is presented. The hardware architectures derived from this algorithm provide low-complexity bit-parallel systolic multipliers with trinomials and pentanomials. The results reveal that our proposed multipliers reduce the space complexity of approximately 15% compared with an existing systolic Montgomery multiplier for trinomials. Moreover, the proposed architectures have the features of regularity, modularity, and local interconnection. Accordingly, they are well suited to VLSI implementation.
- (社)電子情報通信学会の論文
- 2008-06-01
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関連論文
- Efficient Design of Low-Complexity Bit-Parallel Systolic Hankel Multipliers to Implement Multiplication in Normal and Dual Bases of GF (2^m)(Circuit Theory)
- Low-Complexity Parallel Systolic Montgomery Multipliers over GF(2^m) Using Toeplitz Matrix-Vector Representation