Analysis of Jitter in CMOS Ring Oscillators due to Power Supply Noise

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概要

• 論文の詳細を見る

• In this letter a new analytical method is presented for estimating the timing jitter of CMOS ring oscillators due to power supply noise. Predictive jitter equation is presented, and the proposed method is utilized to study the jitter induced by power supply noise in an inverter-based ring oscillator, which is designed and simulated in SMIC 0.13-µm standard CMOS process. A comparison between the results obtained by the proposed method and those obtained by HSPICE simulation proves the accuracy of the predictive equation. Most of the errors between the theoretic calculation and simulation results are less than 3ps.

• （社）電子情報通信学会の論文
• 2009-07-01

著者

• Chen Xin

  China National Asic System Engineering Research Center Southeast University

• Wu Jianhui

  China National Asic System Engineering Research Center Southeast University

• DENG Xiaoying

  China National ASIC System Engineering Research Center, Southeast University

• YANG Jun

  China National ASIC System Engineering Research Center, Southeast University

• Deng Xiaoying

  China National Asic System Engineering Research Center Southeast University

• Yang Jun

  China National Asic System Engineering Research Center Southeast University

• Chen Xin

  China Aerodynamics Research And Development Centre

関連論文

• Analysis of Jitter in CMOS Ring Oscillators due to Power Supply Noise
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