Application-Dependent Interconnect Testing of Xilinx FPGAs Based on Line Branches Partitioning

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概要

• 論文の詳細を見る

• A novel application-dependent interconnect testing scheme of Xilinx Field Programmable Gate Arrays (FPGAs) based on line branches partitioning is presented. The targeted line branches of the interconnects in FPGAs Application Configurations (ACs) are partitioned into multiple subsets, so that they can be tested with compatible Configurable Logic Blocks (CLBs) configurations in multiple Test Configurations (TCs). Experimental results show that for ISCAS89 and ITC99 benchmarks, this scheme can obtain a stuck-at fault coverage higher than 99% in less than 11 TCs.

• 2009-05-01

著者

• YU DunShan

  Department of Microelectronics, Peking University

• Yu Dunshan

  Department Of Microelectronics Peking University

• LIN Teng

  Department of Microelectronics, Peking University

• FENG Jianhua

  Department of Microelectronics, Peking University

• Lin Teng

  Department Of Microelectronics Peking University

• Feng Jianhua

  Department Of Microelectronics Peking University

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• Application-Dependent Interconnect Testing of Xilinx FPGAs Based on Line Branches Partitioning
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