A Novel Hardware Architecture of Intra-Predictor Generator for H.264/AVC Codec

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概要

• 論文の詳細を見る

• The intra-prediction unit is an essential part of H.264 codec, since it reduces the amount of data to be encoded by predicting pixel values (luminance and chrominance) from their neighboring blocks. A dedicated hardware implementation for the intra-prediction unit is required for real-time encoding and decoding of high resolution video data. To develop a cost-effective intra-prediction unit this paper proposes a novel architecture of intra-predictor generator, the core part of intra-prediction unit. The proposed intra-predictor generator enables the intra-prediction unit to achieve significant clock cycle reduction with approximately the same gate count, as compared to Huangs work [3].

• （社）電子情報通信学会の論文
• 2008-07-01

著者

• Har Dongsoo

  Gwangju Inst. Sci. And Technol. Gwangju Kor

• KWAK Sanghoon

  GIST

• KIM Jinwook

  DGIST

• HAR Dongsoo

  GIST

関連論文

• Efficient phase sequence generation for SLM scheme without side information
• A Novel Hardware Architecture of Intra-Predictor Generator for H.264/AVC Codec

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