In-situ comparison of Si/High-K and Si/SiO_2 interface properties in FD SOI MOSFETs operated at low temperature

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概要

• 論文の詳細を見る
• 2007-09-19

著者

• VANDOOREN A.

  Freescale Semiconductors

• Ghibaudo G.

  Imep-inpg Minatec

• Pham-nguyen L.

  Imep-inpg Minatec

• FENOUILLET-BERANGER C.

  ST Microelectronics

• CRISTOLOVEANU S.

  IMEP-INPG MINATEC

• ORLOWSKI M.

  FREESCALE Semiconductors

関連論文

• Highly scalable and WF-tunable Ni(Pt)Si / SiON TOSI-gate CMOS devices obtained in a CMP-less integration scheme
• Effect of Process Induced Strain in 35nm FDSOI Devices with Ultra-Thin Silicon Channels
• In-situ comparison of Si/High-K and Si/SiO_2 interface properties in FD SOI MOSFETs operated at low temperature
• Mechanical and Electrical Analysis of Strained Liner Effect in 35 nm Fully Depleted Silicon-on-Insulator Devices with Ultra Thin Silicon Channels

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