An Ultra-Low Power Expandable 4-bit Adder/Subtracter IC Using Adiabatic Dynamic CMOS Logic Circuit Technology
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概要
- 論文の詳細を見る
- 1999-09-20
著者
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Mizunuma Mitsuru
Yamagata University Faculty Of Engineering Department Of Electrical And Information Engineering
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Takahashi Kazukiyo
Yamagata University Faculty Of Engineering Department Of Electrical And Information Engineering
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Ikeda Koichi
Yamagata University Faculty Of Engineering Department Of Electrical And Information Engineering