Optimisation of CoSi_2 Based Electrical Fuses for Redundancy Implementation in Sub-0.13μm Embedded DRAM Applications

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概要

• 論文の詳細を見る
• 2000-08-28

著者

• Iyer Sundar

  Ibm Microelectronics Semiconductor R&d Centre

• Iyer Subramanian

  Ibm Microelectronics Semiconductor R&d Centre

• KOTHANDARAMAN C.

  Infineon Technologies Corp.

• WU J.

  IBM Microelectronics, Semiconductor R&D centre

関連論文

• Optimisation of CoSi_2 Based Electrical Fuses for Redundancy Implementation in Sub-0.13μm Embedded DRAM Applications

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