FPGAs with Multidimensional Switch Topology(VLSI Systems)

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概要

• 論文の詳細を見る

• This manuscript proposes an FPGA by embedding a multidimensional switch topology onto a two-dimensional chip. We show, using Rent's Rule, that this procedure reduces the number of switches. Then we propose the actual procedure and demonstrate that this does not increase metal wire density critically.

• 社団法人電子情報通信学会の論文
• 2005-04-01

著者

• Matsumoto Yohei

  Graduate School Of Natural Science And Technology Okayama University

• Masaki Akira

  Faculty Of Engineering Okayama University

• Matsumoto Yohei

  Graduate School of Environment and Information Sciences, Yokohama National University

関連論文

• FPGAs with Multidimensional Switch Topology(VLSI Systems)
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