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the Semiconductor Device Engineering Laboratory, TOSHIBA CORPORATION | 論文
- A Hierarchical Global Router for Macro-Block-Embedded Sea-of-Gates (Special Section on VLSI Design and CAD Algorithms)
- High-Density Full-CMOS SRAM Cell Technology with a Deep Sub-Micron Spacing between nMOS and pMOSFET (Special Section on High Speed and High Density Multi Functional LSI Memories)