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University of Pisa | 論文
- Architectural Exploration and Design of Time-Interleaved SAR Arrays for Low-Power and High Speed A/D Converters
- Architectural Exploration and Design of Time-Interleaved SAR Arrays for Low-Power and High Speed A/D Converters
- Power Optimization of an 8051-Compliant IP Microcontroller(Low-Power LSI and Low-Power IP)
- VLSI Design of a Fully-Parallel High-Throughput Decoder for Turbo Gallager Codes(Digital Signal Processing)
- On the Computational Power of Recurrent Neural Networks for Structures
- Point-of-Failure Shortest-Path Rerouting : Computing the Optimal Swap Edges Distributively(Network Protocols, Topology and Fault Tolerance, Parallel/Distributed Computing and Networking)
- The Design of PSB-VVER Experiments Relevant to Accident Management