Garnier P. | STMicroelectronics, Central R&D, 850 rue Jean Monnet, 38921 Crolles, France
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- STMicroelectronics, Central R&D, 850 rue Jean Monnet, 38921 Crolles, Franceの論文著者
STMicroelectronics, Central R&D, 850 rue Jean Monnet, 38921 Crolles, France | 論文
- Mechanical and Electrical Analysis of Strained Liner Effect in 35 nm Fully Depleted Silicon-on-Insulator Devices with Ultra Thin Silicon Channels
- Investigation of Mobility Enhancement Effect in Process-Induced Strained Ultrathin Silicon-on-Insulator Metal–Oxide–Semiconductor Field-Effect Transistors