Hidetoshi Onodera | Department of Communications and Computer Engineering, Kyoto University | JST, CREST
スポンサーリンク
概要
関連著者
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Hidetoshi Onodera
Department of Communications and Computer Engineering, Kyoto University | JST, CREST
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Hidetoshi Onodera
Department of Communications and Computer Engineering Kyoto University
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Akira Tsuchiya
Department of Communications and Computer Engineering Kyoto University
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Haruhiko Terada
Department of Communications and Computer Engineering Kyoto University
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Hiroki Sunagawa
Department of Communications and Computer Engineering, Kyoto University
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Haruhiko Terada
Department of Communications and Computer Engineering, Kyoto University
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Akira Tsuchiya
Department of Communications and Computer Engineering, Kyoto University
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Kazutoshi Kobayashi
Kyoto Institute of Technology
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Takayuki Fukuoka
Department of Communications and Computer Engineering Kyoto University
著作論文
- Effect of Regularity-Enhanced Layout on Variability and Circuit Performance of Standard Cells
- Accurate Estimation of the Worst-case Delay in Statistical Static Timing Analysis