Munakata Chusuke | Department of Electronics, Tohoku Institute of Technology
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概要
Department of Electronics, Tohoku Institute of Technology | 論文
- Systematic Interpretation of Redundant Arithmetic Adders in Binary and Multiple-Valued Logic(Novel Device Architectures and System Integration Technologies)
- A Single-Electron-Transistor Logic Gate Family for Binary, Multiple-Valued and Mixed-Mode Logic(New System Paradigms for Integrated Electronics)
- A Simulation Methodology for Single-Electron Multiple-Valued Logics and Its Application to a Latched Parallel Counter
- A Redox Microarray : An Experimental Model for Molecular Computing Integrated Circuits(New System Paradigms for Integrated Electronics)
- Arithmetic Circuit Verification Based on Symbolic Computer Algebra