KAWAMURA Kazushi | the Department of Computer Science and Engineering, Waseda University
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- 同名の論文著者
- the Department of Computer Science and Engineering, Waseda Universityの論文著者
the Department of Computer Science and Engineering, Waseda University | 論文
- A Locality-Aware Hybrid NoC Configuration Algorithm Utilizing the Communication Volume among IP Cores
- A High-Level Synthesis System for Digital Signal Processing Based on Data-Flow Graph Enumeration (Special Section on VLSI Design and CAD Algorithms)
- A Fast Elliptic Curve Cryptosystem LSI Embedding Word-Based Montgomery Multiplier (System LSIs and Microprocessors, VLSI Design Technology in the Sub-100nm Era)
- A New Hardware/Software Partitioning Algorithm for DSP Processor Cores with Two Types of Register Files(Special Section on VLSI Design and CAD Algorithms)
- Area and Delay Estimation in Hardware/Software Cosynthesis for Digital Signal Processor Cores(Special Section on VLSI Design and CAD Algorithms)