KAWAGUCHI Hiroshi | Department of Computer Science and Systems Engineering, Kobe University
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- KAWAGUCHI Hiroshiの詳細を見る
- 同名の論文著者
- Department of Computer Science and Systems Engineering, Kobe Universityの論文著者
Department of Computer Science and Systems Engineering, Kobe University | 論文
- Cross-Layer Design for Low-Power Wireless Sensor Node Using Wave Clock
- Cross-Layer Design for Low-Power Wireless Sensor Node Using Wave Clock
- A 58-μW Single-Chip Sensor Node Processor with Communication Centric Design
- Phase Assignment Algorithm Based on Traffic Measurement for Real-Time MPEG Sources in ATM Networks
- A 50% Power Reduction in H.264/AVC HDTV Video Decoder LSI by Dynamic Voltage Scaling in Elastic Pipeline(VLSI Architecture,VLSI Design and CAD Algorithms)