Polycrystalline Silicon Thin-Film Flash Memory with Pi-Gate Structure and HfO2 Charge Trapping Layer
スポンサーリンク
概要
- 論文の詳細を見る
This work demonstrates a polycrystalline silicon (poly-Si) thin-film flash nonvolatile memory (NVM) that utilized Pi-shaped gate (Pi-gate) multiple nanowire channels with an HfO2 charge trapping layer. The Pi-gate nanowires (NWs) flash NVM has higher program/erase (P/E) efficiency than the conventional memory with single-channel (SC) structure. This high P/E efficiency is due to the better gate control of the Pi-gate structure. As a result of the high P/E speed, up to $10^{5}$ P/E cycles can be realized. The HfO2 charge trapping layer has a deep conduction band and spatial isolated traps. These characteristics result in good data retention, only 10% charge loss after $10^{9}$ s.
- 2009-12-25
著者
-
Hung Min-feng
Department Of Engineering And System Science National Tsing Hua University
-
Wu Yung-chun
Department Of Engineering And System Science National Tsing Hua University
-
Chang Chin-Wei
Department of Engineering and System Science, National Tsing Hua University, Hsinchu 300, Taiwan, Republic of China
-
Chen Lun-Jyun
Department of Engineering and System Science, National Tsing Hua University, Hsinchu 300, Taiwan, Republic of China
-
Chiang Ji-Hong
Department of Engineering and System Science, National Tsing Hua University, Hsinchu 300, Taiwan, Republic of China
-
Su Po-Wen
Department of Engineering and System Science, National Tsing Hua University, Hsinchu 300, Taiwan, Republic of China
-
Wu Yung-Chun
Department of Engineering and System Science, National Tsing Hua University, Hsinchu 300, Taiwan, Republic of China
関連論文
- High-k materials and poly-Si nanowires in nonvolatile memory for 3D flash memory and display panel applications(Session 8A : Memory 2)
- High-k materials and poly-Si nanowires in nonvolatile memory for 3D flash memory and display panel applications(Session 8A : Memory 2)
- Polycrystalline Silicon Thin-Film Flash Memory with Pi-Gate Structure and HfO2 Charge Trapping Layer
- Optimization of Amorphous Si/Crystalline Si Heterojunction Solar Cells by BF2 Ion Implantation
- Enhancement of Two-Bit Performance of Dual-Pi-Gate Charge Trapping Layer Flash Memory