Optimized Silicidation Technique for Source and Drain of Fin-Type Field-Effect Transistor
スポンサーリンク
概要
- 論文の詳細を見る
An optimization of a Ni-silicidation technique for three-dimensional (3-D) structure devices is investigated. For 3-D structure devices, an undesirable deformation of silicide films due to annealing in the deposition chamber occurs at pattern edges. To avoid this deformation, the deposition control of Ni on a 3-D structure and the precise control of annealing conditions are required. In this work, Ni deposition at a higher pressure to improve its uniformity is adopted and controlled silicidation annealing is implemented during the deposition to exclude the deformation. For 300 and 250 °C annealings, metal-rich Ni3Si2 and Ni2Si phases are observed, respectively, with X-ray diffraction (XRD) spectroscopy. However silicide deformation at pattern edges is observed in the former case. On the other hand, this undesirable deformation is suppressed in 250 °C annealing. To obtain the desirable lower-resistivity NiSi film, a method involving a controlled two-step annealing at 250 °C and a subsequent additional annealing at 450 or 500 °C is successfully developed.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2008-04-25
著者
-
Okuyama Kiyoshi
Research Center For Nanodevice And Systems Hiroshima University
-
Sunami Hideo
Research Center For Nanodevice And Systems Hiroshima University
-
Sugimura Atsushi
Research Center For Nanodevice And Systems Hiroshima University
-
Sunami Hideo
Research Center for Nanodevices and Systems, Hiroshima University, 1-4-2 Kagamiyama, Higashihiroshima, Hiroshima 739-8527, Japan
-
Okuyama Kiyoshi
Research Center for Nanodevices and Systems, Hiroshima University, 1-4-2 Kagamiyama, Higashihiroshima, Hiroshima 739-8527, Japan
-
Sugimura Atsushi
Research Center for Nanodevices and Systems, Hiroshima University, 1-4-2 Kagamiyama, Higashihiroshima, Hiroshima 739-8527, Japan
関連論文
- An Optimized Silicidation Technique for Source and Drain of FINFET
- Application of Arsenic Plasma Doping in Three-Dimensional MOS Transistors and the Doping Profile Evaluation
- An Impurity-Enhanced Oxidation Assisted Doping Profile Evaluation for Three-Dimensional and Vertical-Channel Transistors
- Epitaxial Growth with Light Irradiation
- Observation of Partial Dislocations of a Screw Type in Epitaxial Silicon Layers
- Fabrication of spin-coat optical waveguides for optically interconnected LSI and influence of fabrication process on lower layer MOS capacitors
- Characterization of Subthreshold Behavior of Narrow-Channel SOI nMOSFET with Additional Side-Gate Electrodes
- Cloning and Expression of Purine Nucleoside Phosphorylase I Gene from Bacillus stearothermophilus TH 6-2
- Fabrication of Si Nanowire Field-Effect Transistor for Highly Sensitive, Label-Free Biosensing
- Molecular Cloning and Expression of the Pyrimidine Nucleoside Phosphorylase Gene from Bacillus stearothermophilus TH 6-2
- Field-Shield Trench Isolation with Self-Aligned Field Oxide
- Control of Subthreshold Characteristics of Narrow-Channel Silicon-on-Insulator n-Type Metal–Oxide–Semiconductor Transistor with Additional Side Gate Electrodes
- Potentiality of Metal-Oxide-Semiconductor Silicon Optical Modulator Based on Free Carrier Absorption
- Organic Contamination Dependence of Process-Induced Interface Trap Generation in Ultrathin Oxide Metal Oxide Semiconductor Transistors
- Fabrication of Spin-Coated Optical Waveguides for Optically Interconnected LSI and Influence of Fabrication Process on Underlying Metal–Oxide–Semiconductor Capacitors
- Optimized Silicidation Technique for Source and Drain of Fin-Type Field-Effect Transistor
- Proposal of a Metal–Oxide–Semiconductor Silicon Optical Modulator Based on Inversion-Carrier Absorption