Study of Peeling at Doped NiSi/SiO2 Interface
スポンサーリンク
概要
- 論文の詳細を見る
The peeling of an impurity-doped NiSi film was investigated. We studied silicidation in detail and showed that its procedure varies depending on the doping site and dopant species used. The uneven crystal growth of NiSi causes the local consumption of polycrystalline silicon; thus voids form at the film interface NiSi/SiO2. These voids lead to film peeling. We also determined why the local consumption of polycrystalline silicon occurs. From the data we obtained, impurity may play a role in the local consumption of polycrystalline silicon.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2007-05-30
著者
-
Matsuda Keiko
Toray Res. Center Inc. Shiga Jpn
-
AOYAMA Takayuki
Fujitsu Laboratories Lid.
-
YAMAMOTO Takashi
Toray Research Center, Inc.
-
Sugiyama Naoyuki
Toray Research Center Inc.
-
Hosaka Kimihiko
Fujitsu Laboratories Ltd.
-
Miyamoto Takashi
Toray Research Center Inc.
-
Aoyama Takayuki
Fujitsu Laboratories Ltd., 50 Fuchigami, Akiruno, Tokyo 197-0833, Japan
-
Saito Masahiro
Toray Research Center, Inc., 3-2-1 Sonoyama, Otsu 520-8567, Japan
-
Sugimoto Tomomi
Toray Research Center, Inc., 3-2-1 Sonoyama, Otsu 520-8567, Japan
-
Hosaka Kimihiko
Fujitsu Laboratories Ltd., 50 Fuchigami, Akiruno, Tokyo 197-0833, Japan
-
Sugiyama Naoyuki
Toray Research Center, Inc., 3-2-1 Sonoyama, Otsu 520-8567, Japan
-
Matsuda Keiko
Toray Research Center, Inc., 3-2-1 Sonoyama, Otsu 520-8567, Japan
-
Yamamoto Takashi
Toray Research Center Inc., Otsu 520-8567, Japan
関連論文
- Characterization of HfO_2 Films Prepared on Various Surfaces for Gate Dielectrics(High-κ Gate Dielectrics)
- Characterization of HfO_2 Films Prepared on Various Surfaces for Gate Dielectrics
- Silicon-Hydrogen Bonds in Silicon Native Oxides Formed during Wet Chemical Treatments
- Suppression of Transient Enhanced Diffusion by Local-Oxidation-Silicon-Induced Stress
- Suppression of Transient Enhanced Diffusion by LOCOS Induced Stress
- High Tilt Angle Ion Implantation into Polycrystalline Si Gates
- Analysis of Non-Uniform Boron Penetration of Nitrided Oxide in PMOSFETs Considering Two-Dimensional Nitrogen Distribution
- Boron Penetration Enhanced by Gate Ion Implantation Damage in PMOSFETs
- Hydrogen-Enhanced Boron Penetration in PMOS Devices during SiO_2 Chemical Vapor Deposition
- Hydrogen-Enhancing Boron Penetration in P-MOS Devices during SiO_2 Chemical Vapor Deposition
- Boron Diffusion in Nitrided-Oxide Gate Dielectrics Leading to High Suppression of Boron Penetration in P-MOSFETs
- Boron Diffusion in Nitrided Oxide Gate Dielectrics Leading to High Suppression of Boron Penetration in P-MOSFETs
- Thermal Budget for Fabricating a Dual Gate Deep-Submicron CMOS with Thin Pure Gate Oxide
- Thermal Budget for Fabricating A Dual Gate Deep-Submicron CMOS with Thin Pure Gate Oxide
- Molecular-Scale Structures of Langmuir-Blodgett Films of Fatty Acids Observed by Atomic Force Microscopy
- Thermal Stability of the Yttrium Aluminate Film and the Suppression of its structural change and electrical properties degradation
- Electrical Properties of SiN/HfO_2/SiON Gate Stacks with High Thermal Stability(High-κ Gate Dielectrics)
- Stress Characterization of Si by a Scanning Near-Field Optical Raman Microscope with Spatial Resolution and with Penetration Depth at the Nanometer Level, using Resonant Raman Scattering
- Study of L_ dependence of 2-D carrier profile in N-FET by Scanning Tunneling Microscopy
- Boron Diffusion in SiO_2 Involving High-Concentration Effects
- Boron Diffusion in SiO_2 Involving High-Concentration Effects
- Scanning Tunneling Microscopy Study of Submicron-Sized pn Junction on Si(001) Surfaces
- Characterization of Crystalline Defects and Stress in Shallow Trench Isolation by Cathodoluminescence and Raman Spectroscopies
- Direct measurement of the offset spacer effect on the carrier profiles in sub-50nm p-MOSFETs
- Depth Profile Analysis of Plasma-cured Multi Layer Resist
- Sub-2nm Equivalent SiO_2 Thickness Ta_2O_5 for Gate Dielectric Using RTA+UV/O_3
- Threshold Voltage Instability of 45-nm-node Poly-Si-or FUSI-Gated SRAM Transistors Caused by Dopant Lateral Diffusion in Poly-Si
- Reduction of Electrical Damage due to Au/Pentacene Contact Formation by Introducing Ar Gas during Au Evaporation
- Impact of Metal Gate/High-k Interface in Mo Metal Gated MOSFETs with HfO_2 Gate Dielectrics
- Three-Dimensional Elemental Analysis of Commercial 45nm Node Device with High-k/Metal Gate Stack by Atom Probe Tomography
- Process Integration Issues on Mo-Metal-Gated MOSFETs with HfO2 High-k Gate Dielectrics
- Stress Characterization of Si by a Scanning Near-Field Optical Raman Microscope with Spatial Resolution and with Penetration Depth at the Nanometer Level, using Resonant Raman Scattering
- Microscopic Degradation Mechanisms in Silicon Photovoltaic Module under Long-Term Environmental Exposure
- Comprehensive Study of the X-Ray Photoelectron Spectroscopy Peak Shift of La-Incorporated Hf Oxide for Gate Dielectrics
- Structural Changes of Y2O3 and La2O3 Films by Heat Treatment
- Impact of Thermally Induced Structural Changes on the Electrical Properties of TiN/HfLaSiO Gate Stacks
- High Tilt Angle Ion Implantation into Polycrystalline Si Gates
- Study of Gate Length Dependence of Two-dimensional Carrier Profile in N-FET by Scanning Tunneling Microscopy
- Study of Peeling at Doped NiSi/SiO2 Interface
- Potential of and Issues with Multiple-Stressor Technology in High-Performance 45 nm Generation Devices
- Direct Measurement of Offset Spacer Effect on Carrier Profiles in Sub-50 nm p-Metal Oxide Semiconductor Field-Effect Transistors
- Thermal Budget for Fabricating a Dual Gate Deep-Submicron CMOS with Thin Pure Gate Oxide