The Characteristics of Kink Effect Suppressed Thin Film Transistor by Using Symmetric Dual-Gate
スポンサーリンク
概要
- 論文の詳細を見る
In this paper, a symmetric dual-gate single-Si thin film transistor (TFT), which includes three split floating n+ zones, is simulated. This structure drastically reduces the kink-effect and improves the on-current. This is due to the separated floating n+ zones, the transistor channel region is split into four zones with different lengths defined by a floating n+ region. This structure allows effective reduction in the kink-effect, depending on the length of the two sub-channels. The on-current of the proposed dual-gate structure is 0.9 mA, while that of the conventional dual-gate structure is 0.5 mA, at both 12 V drain and 7 V gate voltages. This result shows an 80% enhancement in on-current. In addition, the reduction of electric field in the channel region compared to a conventional single-gate TFT and the reduction of the output conductance in the saturation region, is observed. In addition, the reduction in hole concentration, in the channel region, in order for effectively reducing the kink-effect, is also confirmed.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2006-05-15
著者
-
Kang Ey
School of Information and communication, Far East University, Kamgok-myun, Eumsung-goon, Choongbuk, Korea
-
Sung Man
Department of Electrical Engineering and Institute for Nano Science, Korea University, Seoul 136-701, Korea
-
Sung Man
Department of Electrical Engineering, Korea University, Anam-dong, Sungbuk-ku, Seoul, Korea
-
Lee Dae-Yeon
Department of Electrical Engineering, Korea University, Anam-dong, Sungbuk-ku, Seoul, Korea
-
Ryu Jang
Department of Electrical Engineering, Korea University, Anam-dong, Sungbuk-ku, Seoul, Korea
-
Kang Ey
School of Information and communication, Far East University, Eumseong, Chungbuk, Korea
関連論文
- A Latch-up Immunized Lateral Trench Insulated Gate Bipolar Transistor with a p+ Diverter Structure for Smart Power Integrated Circuit : Semiconductors
- A Small-Sized Lateral Trench Electrode Insulated Gate Bipolar Transistor for Improving Latch-up and Breakdown Characteristics : Semiconductors
- Improvements of Defects by Patterning Using Thermal Nanoimprint Lithography
- Publisher's Note: ``Improvements of Defects by Patterning Using Thermal Nanoimprint Lithography''
- Publisher's Note: ``The Characteristics of Kink Effect Suppressed Thin Film Transistor by Using Symmetric Dual-Gate''
- Publisher's Note: ``A New Lateral Trench Electrode Insulated Gate Bipolar Transistor with p+ Diverter for Superior Electrical Characteristics''
- Publisher's Note: ``A Latch-up Immunized Lateral Trench Insulated Gate Bipolar Transistor with a p+ Diverter Structure for Smart Power Integrated Circuit''
- Publisher's Note: ``A Small-Sized Lateral Trench Electrode Insulated Gate Bipolar Transistor for Improving Latch-up and Breakdown Characteristics''
- The Subbands and Resonant Tunneling of a Two-Dimensional Electron Gas in a HgCdTe Metal-Insulator-Semiconductor Structure
- The Characteristics of Kink Effect Suppressed Thin Film Transistor by Using Symmetric Dual-Gate
- Temperature-Dependent Gate Effect of Sintered HgTe Nanoparticles
- A New Lateral Trench Electrode Insulated Gate Bipolar Transistor with p+ Diverter for Superior Electrical Characteristics