Direct Measurement of Offset Spacer Effect on Carrier Profiles in Sub-50 nm p-Metal Oxide Semiconductor Field-Effect Transistors
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概要
- 論文の詳細を見る
We have directly measured the effect of the bottom shape in the offset spacer on the two-dimensional (2-D) carrier profiles of the sub-50 nm p-metal oxide semiconductor field-effect transistors (MOSFETs). It has been observed that the doping profile of the Sb pocket implanted with a high angle tilt is very sensitive to the bottom shape of the notched offset spacer. It has been confirmed that the Sb pocket deeply implanted leads to the decrease of 2 nm in the average overlap length of the extension region at a depth of 5 nm when the bottom shape is slightly upped at the notched offset spacer. The increased effective channel length is considered to enhance the dependence of the threshold voltage on the body bias voltage. Moreover, it is considered from the measured carrier profiles that the reduction in carrier concentration in the top channel region lowers the threshold voltage.
- Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
- 2006-04-30
著者
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AOYAMA Takayuki
Fujitsu Laboratories Lid.
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FUKUTOME Hidenobu
Fujitsu Laboratories Ltd.
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USUJIMA Akihiro
FUJITSU LIMITED
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Nakamura Ryou
Fujitsu Limited Advanced Lsi Development Div.
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Saiki Takashi
Fujitsu Limited Advanced Lsi Development Div.
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Saiki Takashi
Fujitsu Limited, 50 Fuchigami, Akiruno, Tokyo 197-0833, Japan
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Nakamura Ryou
Fujitsu Limited, 50 Fuchigami, Akiruno, Tokyo 197-0833, Japan
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Usujima Akihiro
Fujitsu Limited, 50 Fuchigami, Akiruno, Tokyo 197-0833, Japan
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Fukutome Hidenobu
Fujitsu Laboratories Ltd., 50 Fuchigami, Akiruno, Tokyo 197-0833, Japan
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