Kink Suppression Improvement of Polycrystalline Silicon Thin-Film Transistors Employing Asymmetric Dual-Gate Design

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概要

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• Polycrystalline silicon thin-film transistors (poly-Si TFTs) with an asymmetric dual-gate, consisting of a long-gate TFT and a short-gate TFT in series, suppress kink current and increase output resistance. The long-gate TFT operates in a linear regime and confines the total current flow by its current operation region. The entire device does not suffer from kinks in spite of a high drain bias. Experimental results show that an asymmetric design of the dual-gate structure improves kink-free characteristics compared with conventional single- and dual-gate TFTs. The hot-carrier stress reliability of the short-gate TFT is not severely degraded due to kink current suppression.

• Published by the Japan Society of Applied Physics through the Institute of Pure and Applied Physicsの論文
• 2006-03-15

著者

• Kim Ji

  School Of Electronic Engineering Soongsil University

• Han Min-koo

  School Of Electrical Eng. & Computer Science #50 Seoul National University

• Shin Hee-Sun

  School of Electrical Engineering #50, Seoul National University, 151-742 Seoul, Korea

• Nam Woo-Jin

  School of Electrical Engineering #50, Seoul National University, Shinlim-dong, Gwanak-gu, Seoul 151-742, Korea

• Jung Sang-Hoon

  School of Electrical Engineering #50, Seoul National University, 151-742 Seoul, Korea

• Kim Ji

  School of Electrical Engineering #50, Seoul National University, 151-742 Seoul, Korea

• Kim Ji

  School of Advanced Materials Science and Engineering, Sungkyunkwan University, Suwon, Gyeonggi 440-746, Korea

• Han Min-Koo

  School of Electrical al Engineering and Computer Science #50, Seoul National University, Seoul 151-742, Korea

• Han Min-Koo

  School of Electrical Engineering #50, Seoul National University, 151-742 Seoul, Korea

• Nam Woo-Jin

  School of Electrical Engineering #50, Seoul National University, 151-742 Seoul, Korea

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