Ge Dot Array Formation Using Small Convex Position Anchors
スポンサーリンク
概要
- 論文の詳細を見る
On the basis of our recent results of long Ge migration on Si(001) and the Ge dot formation behavior with which Ge dots form at more stable points such as convex structures at higher growth temperatures on patterned Si(001), we propose a formation method for an artificially sized and positioned Ge dot array, with which Ge migrates and Ge dots form at anchor positions, and the dot size is controlled by the amount of Ge growth. Using this method, we successfully form a Ge dot array using an array of small pyramids as an anchor by Ge growth at a growth temperature of 700°C and a postannealing process for migration at a substrate temperature of 700°C for 30 min. The results indicate that the proposed method with the Ge migration and Ge dot anchoring behavior with a small pyramid anchor is very useful in forming an artificially sized and positioned Ge dot array.
- 2004-06-15
著者
-
Suda Yoshiyuki
Faculty Of Technology Tokyo University Of Agriculture And Technology
-
Kitayama Daisuke
Faculty Of Science And Technology Science University Of Tokyo
-
Kitayama Daisuke
Faculty of Technology, Tokyo University of Agriculture and Technology, 2-24-16 Naka-cho, Koganei, Tokyo 184-8588, Japan
-
Yoshizawa Taichi
Faculty of Technology, Tokyo University of Agriculture and Technology, 2-24-16 Naka-cho, Koganei, Tokyo 184-8588, Japan
関連論文
- Effects of Oxidation on Electronic States and Photoluminescence Properties of Porous Si
- Surface Structures and Photoluminescence Mechanisms of Porous Si
- Photoemission Study of the Spectral Function of V_2O_3 in Relation to the Recent Quantum Monte Carlo Study
- Si Atomic-Layer Epitaxy Using Thermally Cracked Si_2H_6
- Si Atomic-Layer-Epitaxy Using Thermally-Cracked-Si_2H_6
- Effects of Anodization Current Density on Photoluminescence Properties of Porous Silicon
- Growth Temperature Window and Self-Limiting Process in Sub-Atomic-Layer Epitaxy
- Bidirectional Signal Transmission Circuit Using Single Electron Tunneling Junctions
- Double-Quantum-Well Si_Ge_x/Si Electron Resonant Tunneling Diode with a High Peak-to-Valley Ratio at RT
- Three-Valued Single-Electron Memory Array with Reading Circuits
- Helicon-Wave-Excited Plasma Treatment of SiO_x Films Evaporated on Si Substrate
- Magnetically Excited Plasma Oxidation of Si
- Improvement of Operation Reliability at Room Temperature for a Single Electron Pump (Special Issue on Technology Challenges for Single Electron Devices)
- Single Electron Three-Valued Memory Array with Reading Circuits
- Novel Single Electron Logic Circuit Family Constructed with Signal Transmission Structures
- Si_f120Ge_x/Si Triple-Barrier RTD with a Peak-to-Valley Ratio of ≧ 180 at RT Formed Using an Annealed Thin Multilayer Buffer
- Signal Transmission Circuit Using Single Electron Tunneling Junctions
- Memory Function of a SiO_2/β-SiC/Si MIS Diode
- Mechanisms and Growth Characteristics of Si Sub-Atomic-Layer Epitaxy from Si_2H_6
- Silicon Oxynitridation with Inductively Coupled Oxygen-Nitrogen Mixed Plasma
- Ge Dot Array Formation Using Small Convex Position Anchors
- Strain-Relief Mechanisms of Stepwise Ge composition Multilayer Buffers and High PVCR Si/Si_Ge_x ASDQW RTD Formed with Triple-Layer Buffer
- Cu Fine Line Direct Drawing Using a Scanning Tunneling Microscope-Electroplating (EP-STM) Combination System