Room Temperature Annealing Behavior of Copper-Related Deep Levels in P-Type Floating Zone Silicon Wafers
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概要
- 論文の詳細を見る
Deep level transient spectroscopy analysis of copper-doped p-type floating-zone silicon (FZ-Si) wafer was performed. Five deep energy level states observed in copper-doped silicon ($E_{\text{v}}+0.1$ eV, $E_{\text{v}}+0.15$ eV, $E_{\text{v}}+0.22$ eV, $E_{\text{v}}+0.26$ eV and $E_{\text{v}}+0.43$ eV) with concentrations of $1\times 10^{11}$ to $1\times 10^{12}$ cm-3 were detected. We observed that the amplitude of only one peak (deep level at $E_{\text{v}}+0.26$ eV) dramatically decreased with time during storage at room temperature, but stabilized at a concentration of about $1\times 10^{12}$ cm-3 after 2 days. The other deep level concentrations did not change after two months storage at room temperature. Therefore, it was concluded that room-temperature annealing resulted in a decrease in the deep level at $E_{\text{v}}+0.26$ eV due to the formation of copper-precipitate related defects and out-diffusion to the silicon surface.
- Publication Office, Japanese Journal of Applied Physics, Faculty of Science, University of Tokyoの論文
- 2001-03-15
著者
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Shingyouji Takayuki
Mitsubishi Materials Corporation Silicon Research Center
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Kurita Kazunari
Mitsubishi Materials Corporation, Silicon Research Center, 1-297 Kitabukuro-cho, Omiya, Saitama 330-0835, Japan
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Shingyouji Takayuki
Mitsubishi Materials Corporation, Silicon Research Center, 1-297 Kitabukuro-cho, Omiya, Saitama 330-0835, Japan
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- Room Temperature Annealing Behavior of Copper-Related Deep Levels in P-Type Floating Zone Silicon Wafers