A Novel Procedure for Evaluating Design Scalability Based on Device Performance Linked to Photolithography

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概要

• 論文の詳細を見る

• We propose a novel procedure for evaluating design scalability based on printed (silicon) pattern simulation and experimental data followed by the extraction of metal oxide semiconductor field effect transistor (MOSFET) geometry and the distribution of device electrical parameters. We demonstrate the procedure on a six-transistor dual word line static random access memory (SRAM) cell, to optimize photolithography process for a technology shrink from 0.16 to 0.13 $\mu$m.

• INSTITUTE OF PURE AND APPLIED PHYSICSの論文
• 2000-12-30

著者

• Axelrad Valery

  Sequoia Design Systems

• KARKLIN Linard

  Numerical Technologies Inc.

• BALASINSKI Artur

  Cypress Semiconductor

• Axelrad Valery

  SEQUOIA Design Systems, 137 Chapman Road, Woodside, CA 94062, U.S.A.

関連論文

• A Novel CDM-Like Discharge Effect during Human Body Model (HBM) ESD Stress(the IEEE International Coference on SISPAD '02)
• A Novel Procedure for Evaluating Design Scalability Based on Device Performance Linked to Photolithography
• A Novel Procedure for Evaluating Design Scalability Based on Device Performance Linked to Photolithography

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