Analysis of Mechanisms for Hot-Carrier-Induced VLSI Circuit Degradation

概要

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In this paper we discuss in detail the mechanism for hot-carrier induced circuit degradation in actual 64Mb DRAM (dynamic random access memory), by investigating the DRAM specification parameter shift due to transistor aging in each of the constituent circuits. It was found that hot-carrier induced transistor aging of the circuit block does not directly affect the internal clock speed degradation, however, it does greatly reduces the design margin of a circuit which suffers from heavy loads. In addition, an in-depth study of the dynamic hot-carrier degradation behavior of N-channel transistors more common in actual VLSI circuits was carried out based on the alternating stress and charge pumping techniques.
INSTITUTE OF PURE AND APPLIED PHYSICSの論文
1996-02-28