Interface circuit of sigma-delta accelerometer with on-chip-test function
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概要
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A fifth-order fully differential interface circuit (IC) with on-chip-test function is presented to improve the noise performance for micromechanical sigma-delta (Σ-Δ) accelerometer. The proposed on-chip-test technique for Σ-Δ accelerometers avoids a shaker table applying a sinusoidal signal as the simulated acceleration which involves distortion itself. An electrostatic force feedback linearization circuit is presented to reduce the harmonic distortion resulting in a larger dynamic range (DR). The post-simulation results show that the electrostatic force feedback linearization circuit decreases the harmonic distortion effectively and the proposed on-chip-test technique achieves 98 dB third-order harmonic distortion detection, and the nonlinearity of the proposed circuit is 0.02%.
- The Institute of Electronics, Information and Communication Engineersの論文
The Institute of Electronics, Information and Communication Engineers | 論文
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