New CNTFET-Based Arithmetic Cells with Weighted Inputs for High Performance Energy Efficient Applications
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概要
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This paper presents symmetric and full swing designs of multiplier and full adder cells, based on weighted inputs for nanotechnology. Carbon Nanotube Field Effect Transistors (CNTFETs) are used to implement the circuits. Proposed designs are simulated using the HSPICE simulation tool and they are compared with their counterparts in terms of delay, power consumption and power-delay product. Significant improvements have been achieved at different voltage levels and different frequencies, load capacitors and temperatures have also been tested. Finally, process variation issue has been analyzed and the results have been reported.
著者
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GHASEMI Mehdi
Nanotechnology and Quantum Computing Lab., Shahid Beheshti University G.C.
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NAVI Keivan
Nanotechnology and Quantum Computing Lab., Shahid Beheshti University G.C.
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MALEKNEJAD Mojtaba
Science and Research Branch, IAU