Noise margin and short-circuit current in FGMOS logics
スポンサーリンク
概要
- 論文の詳細を見る
Even when floating-gate logics are very-low-voltage circuits, as power supply is reduced, large fan-in FGMOS gates are prone to fail. Thus, determining the negative impact of noise margin and short-circuit current in this type of circuits is crucial to achieve optimal operation for a particular application. For this reason, a systematic and reliable technique for obtaining the correlation between fan-in and supply voltage, simultaneously considering noise margin and short-circuit current, is proposed.
論文 | ランダム
- 108. 北海道北大夕張地域白亜系の大型化石層序
- 渇水に想う
- 6.不登校児の新しい視点 : PDD & PDDNOS(第58回日本心身医学会中部地方会演題抄録)
- 5.うつ病診断名における職場不適応 : PDD & PDDNOS(第58回日本心身医学会中部地方会演題抄録)
- 4.うつ病の自殺について : 微笑みうつ病(第58回日本心身医学会中部地方会演題抄録)