Noise margin and short-circuit current in FGMOS logics
スポンサーリンク
概要
- 論文の詳細を見る
Even when floating-gate logics are very-low-voltage circuits, as power supply is reduced, large fan-in FGMOS gates are prone to fail. Thus, determining the negative impact of noise margin and short-circuit current in this type of circuits is crucial to achieve optimal operation for a particular application. For this reason, a systematic and reliable technique for obtaining the correlation between fan-in and supply voltage, simultaneously considering noise margin and short-circuit current, is proposed.
論文 | ランダム
- 統計データ解析チューターシステム(アイビス)の構想
- 特発性大網捻転症の1例
- 市民自治の思想(11)第2章 市民自治(2)なぜ規範人間型か 人間の型が政治の姿を決める--自律した個人が民主政治を生む
- 静止形周波数変換装置
- 複数の電力変換装置を用いた新幹線き電システムの交流電圧制御の安定性解析