Two-Way Parity Bit Correction Encoding Algorithm for Dual-Diagonal LDPC Codes
スポンサーリンク
概要
- 論文の詳細を見る
In this paper, an efficient encoding scheme for dual-diagonal LDPC codes is proposed. Our two-way parity bit correction algorithm breaks up the data dependency within the encoding process to achieve higher throughput, lower latency and better hardware utilization. The proposed scheme can be directly applied to dual-diagonal codes without matrix modifications. FPGA encoder prototypes are implemented for IEEE 802.11n and 802.16e codes. Results show that the proposed architecture outperforms in terms of throughput and throughput/area ratio.
論文 | ランダム
- 水平偏向回路に用いるトランジスタの具備すべき特性について
- 腹部超音波診断法
- Magnetically Excited Plasma Oxidation of GaAs
- Decreasing Potassium Conductance : A Possible Mechanism of Phasic Coronary Vasospasm : SYMPOSIUM ON PATHOGENESIS OF CORONARY ARTERY SPASM
- DYNAMICS OF BLOOD FLOW IN THE ACUTELY INDUCED ISCHEMIC MYOCARDIUM : Proceedlngs of the 35th Annual Meetlng of the Japanese Circulation Society (part II)