Microprocessor power noise measurements with different levels of resource occupancy

概要

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Power noise waveforms of a 32-bit microprocessor were on-chip measured in a 90-nm CMOS technology. A dedicated measurement system combines an embedded programming environment and a measurement flow that ensures acquisition of noise waveforms during designated arithmetic operation. Power noise exhibits clear relation with the contents of computation, where the magnitude of power noise reflects the occupancy ratio of computing resources of a microprocessor. The level of correlation is shown to be different among static and dynamic portions of power noise. It is concluded that practical power noise analysis requires the higher-level abstraction of a large-scale integrated digital system.