Analysis of Inductive Coupling and Design of Rectifier Circuit for Inter-Chip Wireless Power Link
スポンサーリンク
概要
- 論文の詳細を見る
A wireless power link utilizing inductive coupling is developed between stacked chips. In this paper, we discuss inductor layout optimization and rectifier circuit design. The inductive-coupling power link is analyzed using simple equivalent circuit models. On the basis of the analytic models, the inductor size is minimized for the given required power on the receiver chip. Two kinds of full-wave rectifiers are discussed and compared. Various low-power circuit design techniques for rectifiers are employed to decrease the substrate leakage current, reduce the possibility of latch-up, and improve the power transmission efficiency and the high-frequency performance of the rectifier block. Test chips are fabricated in a 0.18µm CMOS process. With a pair of 700 × 700µm2 on-chip inductors, the test chips achieve 10% peak efficiency and 36mW power transmission. Compared with the previous work the received power is 13 times larger for the same inductor size [7].
論文 | ランダム
- 人口減少下のストックマネジメント (特集 既存ストック等の有効活用・維持管理)
- 環境にやさしい社会の実現に向けて (特集 環境にやさしい社会の実現--健全で恵み豊かな自然環境の保全・再生)
- 果実の健全性と消費拡大のための展望
- On the Terms Koshushaku and Shakushuko
- 『庚午年籍』以前--戸籍の成り立ちとその展開 (特集 古代帳簿論の新たな可能性)