A High Throughput LDPC Decoder Design Based on Novel Delta-value Message-passing Schedule
スポンサーリンク
概要
- 論文の詳細を見る
In this paper, we propose a partially-parallel irregular LDPC decoder for IEEE 802.11n standard targeting high throughput applications. The proposed decoder has several merits: (i) The decoder is designed based on a novel delta-value based message passing algorithm which facilitates the decoding throughput by redundant computation removal. (ii) Techniques such as binary sorting, parallel column operation, high performance pipelining are used to further speed up the message-passing procedure. The synthesis result in TSMC 0.18 CMOS technology demonstrates that for (648, 324) irregular LDPC code, our decoder can achieve 8 times increasement in throughput, reaching 418Mbps at the frequency of 200MHz.
論文 | ランダム
- 21149 免震建物の微振動特性に関する研究 : (その2)免震装置の微振動レベルでの剛性評価(免震微振動解析,構造II)
- 21202 鉛プラグ入り積層ゴムの再生利用に関する調査(積層ゴム(3),構造II)
- 21184 端部回転を受ける免震装置の力学挙動 : その1 鉛プラグ入り積層ゴム・高減衰積層ゴムの加力実験(積層ゴム(1),構造II)
- 3148 弾性すべり支承の耐火被覆システムの開発 : その2:載荷加熱試験(免震装置・区画部材の耐火性,防火)
- 3149 弾性すべり支承の耐火被覆システムの開発 : その3:加熱後のすべり支承の性能確認(免震装置・区画部材の耐火性,防火)